1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, a semiconductor device comprising a through silicon via (TSV) and a contact ring.
2. Description of the Prior Art
Nowadays micro-processor systems including integrated circuits (IC) are polyvalent devices, and are used in diverse fields such as automatic control electronics, mobile communication devices and personal computers. With the development of technology and the increasingly imaginative applications of electrical products, the IC devices are increasingly smaller, more precise and more diversified.
As known in the art, IC devices are produced from dies that are fabricated through conventional semiconductor manufacturing processes. A process to manufacture a die starts with a wafer: first, different regions are marked on the wafer; then conventional semiconductor manufacture processes, such as deposition, photolithography, etching or planarization are used to form required circuit traces; then each region of the wafer is separated to form a die and packaged to form a chip; finally, the chips are attached onto boards, for example a printed circuit board (PCB), and the chips are electrically coupled to the pins on the PCB. Thus, each of the programs on the chip can be performed.
In order to evaluate the functions and the efficiency of a chip and increase the capacitance density in order to accommodate more IC components in a limited space, many semiconductor packaging are built up by stacking each die and/or chip, for example, Flip-Chip technology, Multi-chip Package (MCP) technology, Package on Package (PoP) technology and Package in Package (PiP) technology. Besides these technologies, a “Through Silicon Via (TSV)” technique has been well developed in recent years. The TSV can improve the interconnections between the dies in the package so as to increase the package efficiency.
The first step to fabricate a TSV is to form a via on a wafer by an etching or a laser process, then fill the via with copper, polycrystalline silicon, tungsten, or other conductive materials; then, the chips are thinned and packaged or bonded to forma 3D package structure. When using the TSV technique, the interconnection route between the chips is shorter. Thus, in comparison to other technologies, the TSV has the advantages of faster speed, less noise and better efficiency, and therefore looks set to become one of the most popular technologies in the future.
However, there are some issues in the integration process of the TSV with others components. For example, during the step of forming the TSV, vias formed through etching or laser processes may directly expose the metal pad, causing metal contamination and influence others components surrounding the TSV.